High Speed Interface(IO) Design Engineer

RESPONSIBILITIES

• Integrate and verify HSI IP blocks in SoC, and support physical implementation
• Configure HSI IP blocks to be integrated into SoC to achieve maximum performance
• Performance analysis in chip top level (bus, memory bandwidth) simulation and FPGA prototyping
• Test, Debugging & Troubleshooting of Silicon collaborating with HSI IP vendors

MINIMUM QUALIFICATIONS

• 5+ years of industry experience in chip design, specializing in HSI(High-Speed Interface) technology
• Experience in RTL design and logic synthesis, verification, timing closure

PREFERRED QUALIFICATIONS

• Excellent understanding of High-Speed Interface standard specifications (e.g PCIe, LPDDR, HBM, Ethernet or D2D)
• High understanding of High-Speed interface technology e.g. SERDES, Channel encoding, OSI-7 layer, Equalization, etc.
• Experience in SoC design with HSI and troubleshooting in Silicon using Test Equipment
• Understanding of System-level usage of HSI application

CONTACT

• recruit@furiosa.ai