Design Verification Engineer

Job Description

Your Role

Lead and own end‑to‑end Design Verification for TPU/AI accelerator and SoC platforms, driving verification planning, execution, and delivery across IP and system levels.

Minimum 7 years of experience is mandatory.

In this role, you will

• Own TPU-related DV activities; collaborate with architecture, design, and software teams
• Perform RTL, IP, subsystem, and full SoC verification
• Develop and execute verification plans and functional test scenarios
• Handle system-level and non‑UVM verification
• Debug complex issues including CPU interactions and SoC boot flows
• Automate regressions, debug, and reporting through scripting

Your Profile

• System Verilog, UVM, SVA
• C / C++ based verification
• CPU debug, SoC boot (reset, Boot ROM, firmware)
• Scripting Python / Perl / Shell / Tcl

What You’ll Love About Working Here

• Collaborative work environment with focus on innovation and professional growth.
• Continuous learning opportunities to enhance technical and domain expertise.

About Capgemini in India

Capgemini is an AI‑powered global business and technology transformation partner, helping organizations realize their future through technology, data, and people. With nearly 60 years of heritage , Capgemini is a responsible and diverse organization with 420,000 team members across more than 50 countries . The Group reported global revenues of €22.1 billion in 2024 .

Capgemini in India comprises nearly 235,000 team members working across 13 locations , including Bengaluru, Chennai, Hyderabad, Mumbai, Pune, Noida, Gurugram, and more. We deliver end‑to‑end services across strategy, technology, engineering, and operations .

Make it real | www.capgemini.com/in ‑en